Integer unit instruction timings

-------------------+----------------------+----------------+-----------+
   Instruction     |       Condition      | <ea> Calculate |  Execute  |
-------------------+----------------------+----------------+-----------+
ABCD               | Dy,Dx                |        1       |     3     |
                   | -(Ay),-(Ax)          |        3       |   1L+3    |
-------------------+----------------------+----------------+-----------+
ADDX               | Dy,Dx                |        1       |     3     |
                   | -(Ay),-(Ax)          |        3       |   1L+2    |
-------------------+----------------------+----------------+-----------+
ANDI #<xxx>,CCR    |          --          |        1       |     4     |
-------------------+----------------------+----------------+-----------+
ANDI #<xxx>,SR (a) |          --          |        9       |   1L+8    |
-------------------+----------------------+----------------+-----------+
Bcc                | Branch Taken         |        2       |     2     |
                   | Branch Not Taken     |        3       |     3     |
-------------------+----------------------+----------------+-----------+
BRA                |          --          |        2       |     2     |
-------------------+----------------------+----------------+-----------+
BSR <offset>       |          --          |        2       |   1L+1    |
-------------------+----------------------+----------------+-----------+
CAS2 (b)           | True                 |       56       |   6L+49   |
                   | False                |       51       |   6L+44   |
-------------------+----------------------+----------------+-----------+
CMPM               |          --          |        3       |   1L+2    |
-------------------+----------------------+----------------+-----------+
DBcc (c)           | False, Count > -1    |        3       |     3     |
                   | False, Count = -1    |        4       |     4     |
                   | True                 |        4       |     4     |
-------------------+----------------------+----------------+-----------+
EORI #<xxx>,CCR    |          --          |        1       |     4     |
-------------------+----------------------+----------------+-----------+
EORI #<xxx>,SR (a) |          --          |        9       |   1L+8    |
-------------------+----------------------+----------------+-----------+
EXG                | Dy,Dx                |        1       |     1     |
                   | Ay,Ax                |        2       |   1L+1    |
                   | Dy,Ax                |        1       |     1     |
-------------------+----------------------+----------------+-----------+
EXT                | Word                 |        1       |     2     |
                   | Long Word            |        1       |     1     |
-------------------+----------------------+----------------+-----------+
EXTB               | Long Word            |        1       |     1     |
-------------------+----------------------+----------------+-----------+
ILLEGAL (a)        | A-Line Unimplemented |       16       |    16     |
                   | F-Line Unimplemented |       16       |    16     |
-------------------+----------------------+----------------+-----------+
LINK               |          --          |        3       |   2L+1    |
-------------------+----------------------+----------------+-----------+
MOSE USP           | USP,An               |        3       |   2L+1    |
                   | An,USP (a)           |        7       |   1L+6    |
-------------------+----------------------+----------------+-----------+
MOVE16 (c,d)       | (Ax)+,(Ay)+          |        6       |   1L+7    |
                   | xxx.L,(An)           |        4       |     7     |
                   | xxx.L,(An)+          |        5       |     8     |
                   | (An),xxx.L           |        4       |     7     |
                   | (An)+,xxx.L          |        4       |     7     |
-------------------+----------------------+----------------+-----------+
MOVEC (b)          | Rn,Rc                |        7       |   1L+6    |
                   | Rc,Rn                |       11       |   1L+10   |
-------------------+----------------------+----------------+-----------+
MOVEP (c)          | MOVEP.W Dn,d16(An)   |       11       |   2L+9    |
                   | MOVEP.L Dn,d16(An)   |       13       |   2L+11   |
                   | MOVEP.W d16(An),Dn   |        4       |   2L+5    |
                   | MOVEP.L d16(An),Dn   |        8       |   2L+8    |
-------------------+----------------------+----------------+-----------+
MOVEQ              |          --          |        1       |     1     |
-------------------+----------------------+----------------+-----------+
NOP (a)            |          --          |        8       |   1L+7    |
-------------------+----------------------+----------------+-----------+

NOTES:
~~~~~
a. Times listed are minimum. This instruction interlocks the <ea> calculate
and execute stages and synchronizes some portions of the processor before
execution.

b. Times listed are typical. This instruction interlocks the <ea> calculate
and execute stages and synchronizes some portions of the processor before
execution.

c. This instruction interlocks the <ea> calculate and execute stages.

d. Successive in-line MOVE16 instructions each add 8 clocks to the <ea>
calculate and execute times

e. Typical measurement for three-level table search with no descriptor writes,
no entries cached, and four-clock memory access times.

f. This instruction also synchronizes some portions of the processor before
execution; times listed are minimum in this case.

-------------------+----------------------+----------------+-----------+
   Instruction     |       Condition      | <ea> Calculate |  Execute  |
-------------------+----------------------+----------------+-----------+
ORI #<xxx>,CCR     |          --          |        1       |     4     |
-------------------+----------------------+----------------+-----------+
ORI #<xxx>,SR (a)  |          --          |        9       |   1L+8    |
-------------------+----------------------+----------------+-----------+
PACK               | Dx,Dy,#<xxx>         |        1       |     3     |
                   | -(Ay),-(Ax),#<xxx>   |        3       |   2L+3    |
-------------------+----------------------+----------------+-----------+
PFLUSH (b)         |          --          |       11       |   1L+10   |
-------------------+----------------------+----------------+-----------+
PFLUSHA (b)        |          --          |       11       |   1L+10   |
-------------------+----------------------+----------------+-----------+
PFLUSHAN (b)       |          --          |       27       |   1L+26   |
-------------------+----------------------+----------------+-----------+
PFLUSHN (An) (b)   |          --          |       11       |   1L+10   |
-------------------+----------------------+----------------+-----------+
PTESTR, PTESTW (e) |          --          |       25       |  11L+14   |
-------------------+----------------------+----------------+-----------+
RESET (a)          |          --          |       521      |    521    |
-------------------+----------------------+----------------+-----------+
RTD (c)            |          --          |        6       |   1L+5    |
-------------------+----------------------+----------------+-----------+
RTE (a)            | Stack Format $0      |        2       |    13     |
                   | Stack Format $1      |        4       |    23     |
                   | Stack Format $2      |        2       |    14     |
                   | Stack Format $3      |        3       |    20     |
                   | Stack Format $4      |        2       |    15     |
                   | Stack Format $7      |        4       |    23     |
-------------------+----------------------+----------------+-----------+
RTR (c)            |          --          |        7       |   1L+6    |
-------------------+----------------------+----------------+-----------+
RTS (c)            |          --          |        5       |     5     |
-------------------+----------------------+----------------+-----------+
SBCD               | Dy,Dx                |        1       |     3     |
                   | -(Ay),-(Ax)          |        3       |   1L+3    |
-------------------+----------------------+----------------+-----------+
SUBX               | Dy,Dx                |        1       |     1     |
                   | -(Ay),-(Ax)          |        3       |   1L+2    |
-------------------+----------------------+----------------+-----------+
SWAP               |          --          |        1       |     2     |
-------------------+----------------------+----------------+-----------+
TRAP # (a)         |          --          |       16       |    16     |
-------------------+----------------------+----------------+-----------+
TRAPcc (f)         | Taken                |       19       |    19     |
                   | Not Taken            |        5       |     5     |
-------------------+----------------------+----------------+-----------+
TRAPV (f)          | Taken                |       19       |    19     |
                   | Not Taken            |        5       |     5     |
-------------------+----------------------+----------------+-----------+
UNLK               |          --          |        2       |   1L+1    |
-------------------+----------------------+----------------+-----------+
UNPK               | Dy,Dx,#              |        1       |     4     |
                   | -(Ay),-(Ax),#        |        3       |   2L+4    |
-------------------+----------------------+----------------+-----------+

NOTES:
~~~~~
a. Times listed are minimum. This instruction interlocks the <ea> calculate
and execute stages and synchronizes some portions of the processor before
execution.

b. Times listed are typical. This instruction interlocks the <ea> calculate
and execute stages and synchronizes some portions of the processor before
execution.

c. This instruction interlocks the <ea> calculate and execute stages.

d. Successive in-line MOVE16 instructions each add 8 clocks to the <ea>
calculate and execute times

e. Typical measurement for three-level table search with no descriptor writes,
no entries cached, and four-clock memory access times.

f. This instruction also synchronizes some portions of the processor before
execution; times listed are minimum in this case.

----------------+-------------------++-------------------++-------------------+
                |                   ||                   ||                   |
                |     ADDQ, SUBQ    ||        ASL        ||   ASR, LSL, LSR   |
                |                   ||                   ||                   |
 Addressing     +---------+---------++---------+---------++---------+---------+
   Mode         |   <ea>  | Execute ||   <ea>  | Execute ||   <ea>  | Execute |
                |Calculate|         ||Calculate|         ||Calculate|         |
----------------+---------+---------++---------+---------++---------+---------+
Dn              |    1    |    1    ||    1    |   3/4*  ||    1    |   2/3*  |
----------------+---------+---------++---------+---------++---------+---------+
An              |    1    |    1    ||    -    |    -    ||    -    |    -    |
----------------+---------+---------++---------+---------++---------+---------+
(An)            |    1    |    1    ||    1    |    3    ||    1    |    2    |
----------------+---------+---------++---------+---------++---------+---------+
(An)+           |    2    |  1L+1   ||    1    |    3    ||    2    |    2    |
----------------+---------+---------++---------+---------++---------+---------+
-(An)           |    2    |  1L+1   ||    1    |    3    ||    2    |    2    |
----------------+---------+---------++---------+---------++---------+---------+
(d16,An)        |    2    |  1L+1   ||    1    |    3    ||    2    |    2    |
----------------+---------+---------++---------+---------++---------+---------+
(d16,PC)        |    -    |    -    ||    -    |    -    ||    -    |    -    |
----------------+---------+---------++---------+---------++---------+---------+
(xxx).W,(xxx).L |    1    |    1    ||    1    |    2    ||    2    |    2    |
----------------+---------+---------++---------+---------++---------+---------+
#<xxx>          |    -    |    -    ||    -    |    -    ||    -    |    -    |
----------------+---------+---------++---------+---------++---------+---------+
(d8,An,Xn)      |    3    |    3    ||    3    |    5    ||    3    |    4    |
----------------+---------+---------++---------+---------++---------+---------+
(d8,PC,Xn)      |    -    |    -    ||    -    |    -    ||    -    |    -    |
----------------+---------+---------++---------+---------++---------+---------+
(BR,Xn)         |    7    |  1L+6   ||    7    |  1L+8   ||    7    |  1L+7   |
----------------+---------+---------++---------+---------++---------+---------+
(bd,BR,Xn)      |    8    |  1L+7   ||    8    |  1L+9   ||    8    |  1L+8   |
----------------+---------+---------++---------+---------++---------+---------+
([bd,BR,Xn])    |   10    |  1L+9   ||   10    |  1L+11  ||   10    |  1L+10  |
----------------+---------+---------++---------+---------++---------+---------+
([bd,BR,Xn],od) |   11    |  1L+11  ||   11    |  1L+12  ||   11    |  1L+11  |
----------------+---------+---------++---------+---------++---------+---------+
([bd,BR],Xn)    |   11    |  3L+8   ||   11    |  3L+10  ||   11    |  3L+9   |
----------------+---------+---------++---------+---------++---------+---------+
([bd,BR],Xn,od) |   12    |  3L+10  ||   12    |  3L+11  ||   12    |  3L+10  |
----------------+---------+---------++---------+---------++---------+---------+
*Immediate count specified for shift count/shift cound specified for register,
respectively.