Decrement and Branch on CoProcessor condition

NAME
	cpDBcc -- Decrement and branch on coprocessor condition

SYNOPSIS
	cpDBcc	Dn,<label>

	Offset size = (Word)

FUNCTION
	If specified coprocessor condition is true, program execution
	continues with next instruction. Else 16 bits of data register which
	are used as a counter, are decremented of one.
	If Dn = -1, execution continues with next instruction.
	If Dn =! -1, execution continues to address pointed by searching PC
	more offset; searching PC containing address of first word of offset.
	Offset is a signed value of 16 bits, which represents the relative gap
	in bytes between the searching PC and destination address.

FORMAT
	-----------------------------------------------------------------
	|15 |14 |13 |12 |11 |10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
	|---|---|---|---|-----------|---|---|---|---|---|---|-----------|
	| 1 | 1 | 1 | 1 | CP-ID =! 0| 0 | 0 | 1 | 0 | 0 | 1 | REGISTER  |
	|---|---|---|---|-----------|---|---|---|-----------------------|
	| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | COPROCESSOR CONDITION |
	|---------------------------------------------------------------|
	|              OPTIONAL COPROCESSOR EXTENSION WORD              |
	|---------------------------------------------------------------|
	|                            16 BITS OFFSET                     |
	-----------------------------------------------------------------

	CP-ID field identify coprocessor (1 to 7). If CP-ID=0,
	"line emulation F" exception is generated.

	"COPROSSESSOR CONDITION" field, specifies condition to test.
	This condition is addressed to coprocessor which, after examining
	this one, address directives to processor in order to execute
	the instruction.

	Register field indicates the number of data register used as counter.

RESULT
	Not affected.

SEE ALSO
	cpBcc